Low Power, High-performance Delta Sigma Modulator with Test DAC

The CS5373A is a single-channel, high-performance, low power, fourth-order Delta Sigma modulator plus an integrated test DAC for sensor and electronics channel testing. The CS5376A is a multifunction digital filter utilizing a low power signal processing architecture to achieve efficient filtering for Delta Sigma modulators. When combined, the CS5373A and CS5376A produce a compact high-resolution, self-testing, analog-to-digital measurement system that is ideal for single-sensor seismic and geophysical applications. The CS5373A modulator provides high dynamic range and low total harmonic distortion, while consuming significantly less power per channel than our previous generation seismic modulators. This modulator consumes 5 mA in normal operation, 220 µA when placed in sleep mode and by halting the input clock of the modulator it enters a power-down state using only 2 µA. The CS5373A integrated Test DAC is a multifunction differential output digital-to-analog converter intended to test high-resolution, low-frequency measurement systems. The dual outputs provide a precision output (OUT±) for testing the electronics channel and a buffered output (BUF±) for in-circuit sensor testing. DAC distortion performance (THD) is typically -116 dB from the precision output and -105 dB from the buffered output. Noise performance is 114 dB SNR over a 430 Hz bandwidth. Driven with a digital Delta Sigma bit-stream from the CS5376A digital filter, the maximum AC analog output voltage is a differential 5 V peak-to-peak signal. Low power consumption, selectable attenuation, dual outputs and programmable test modes make this device ideal for testing single sensor seismic acquisition systems and geophysical instruments.

Features

CS5373A Features

  • Dual power supply configuration
    • VA+ = 2.5 V; VA- = -2.5 V; VD = 3.3 V
  • Small footprint: 28-pin package

Modulator

  • 24-bit analog-to-digital conversion
  • Fourth-order Delta Sigma architecture
  • Clock-jitter-tolerant architecture
  • Input voltage range 5 Vp-p differential
  • High dynamic range (signal-to-noise ratio)
    • 127 dB at 215 Hz bandwidth (2 ms sampling)
    • 124 dB at 430 Hz bandwidth (1 ms sampling)
  • Low Total Harmonic Distortion (THD)
    • -118 dB THD typical
    • -112 dB THD max
  • Low power consumption
    • Normal mode: 5 mA
    • Sleep mode: 220 µA
    • Power-down mode: 2 µA

Test DAC

  • Digital Delta Sigma input, differential analog output
  • Selectable differential outputs (OUT±, BUF±)
  • Pin selectable-output attenuation
    • 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
  • User programmable test modes
    • AC differential/common mode output
    • DC pulse/calibration output
  • AC output voltage: 5 Vp-p differential
  • DC output voltage: 2.5 Vdc differential
  • Outstanding noise performance
    • 114 dB SNR @ 430 Hz bandwidth
  • Low total harmonic distortion (THD)
    • OUT±: -116 dB THD typical, -112 dB THD max
    • BUF±: -105 dB THD typical, -95 dB THD max
  • Low power consumption
    • Normal mode: 8 mA
    • Sleep mode: 500 µA
    • Power-down mode: 120 µA

Parametric Specifications

Resolution (bits) 24
Dynamic Range (dB) 124 ADC;
114 DAC
THD (dB) -118 ADC;
-116 DAC
Power Consumption Per Channel (mW) 25
Signal Range (Vp-p diff) 5
Package 28 SSOP

Technical Documents

CS5373A Product Data Sheet

Oct 18, 2010, DS703F2 : 414 Kb

CS5373A/78 Product Bulletin

Sep 20, 2007, 0170-0807-PB-W : 439 Kb

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