CS61581

Universal Line Interface Unit

Overview

Power Supply (V)	Control Modes	Line Coders	Number of Channels	TBR-12 Compliant	Impedance Matching Line Driver	Arbitrary Waveform Option	Package
5	Host & H/W	AMI, B8ZS & HDB3	1				28 PDIP 28 PLCC

Description

The CS61581 is a primary rate line interface unit capable of operation in both short-haul (intraoffice) and long-haul applications. The CS61581 combines the complete analog transmit and receive circuitry for a single, full-duplex interface at T1 and E1 rates.

The device is pin- and function-compatible with the Intel®/Level One® LXT310 and LXT318 (the latter in the host mode only). The device can also replace LXT359 and LXT360.

Enhanced functionality is available through an extended register set allowing short-haul operation, custom pulse-shape generation, quasi-random-signal-source (QRSS) pattern generation, detection/error counting and generation/detection of loop-up and loop-down codes. The CS61581 features low-power, impedance-matched line drivers and crystal-less jitter attenuation.

Features

• T1/E1, long-haul/short-haul line interface
• QRSS test signal and error detector
• Impedance-matching line driver using a single transformer
• Greater than 14 dB of transmit return loss without using external resistors
• No crystal needed for jitter attenuation
• Meets AT&T 62411 and TBR 12/13 jitter tolerance and attenuation requirements
• Meets ANSI T1.231B, ITU-T G.775 for LOS/AIS
• Meets BS6450 transmitter short-circuit E1 requirements
• Compliant with
• ITU-T Recommendations: G.703, G.732, G.775, I.431
• ANSI: T1.102, T1.105, T1.403, T1.408, and T1.231
• FCC Rules and Regulations: Part 68 and Part 15
• AT&T Publication 62411
• ETSI ETS 300 011, 300 233, TBR 12/13
• TR-NET-00499
• Package: 28-pin PDIP, 28-pin PLCC; lead-free assembly

Diagram